FALCOM F35-XXL-SI

Integrated CPU core features     NEC V850SA1 + eCosTM RTOS  1 to 2 MB Flash and SRAM   4 kB EEPROM, RTC, watchdog  4 UARTs, I²D, SPI (MMC)   8 GPIOs  8 GPIs (up to 8 analog inputs)   CPLD for external logic control  16 Bit address/data bus multiplexed Integrated GSM/GPRS core supports     Dual Band GSM 900/1800   Voice, SMS, Data, Fax   GPRS class B, multi-slot class 8   CS 1 to 4 and PBCCH support Integrated 12 channel GPS core supports     3D/2D/DGPS navigation   NMEA-0183, RTCM SC-104, SiRF binary format   Superior TTFF acquisition rate   Default trickle power mode Complete FTA/CE Approval Integrated SIM card reader Compact form factor		The FALCOM F35-XXL-SI is standardized but flexible platform for broadest application spectrum.
The FALCOM F35-XXL-SI   combines the advantages of a standardized module with those of an open platform, bringing together the best of both worlds. The on-board complete CPU core permits fast, cost-effective integration of the individual customer solution, thus dispensing with additional systems. Thanks to support of the eCos as a fully featured real-time operating system, tailor made system solutions can be rapidly developed on the basis of the standardized platform. The F35-XXL concept reduces your BOM cost as well as complex, time-consuming system integration evaluation and integration tests, getting you to market at least 6 to 8 months faster. The unique combination of hardware and software resources makes the F35-XXL concept perfect not only for current generations of smart wireless devices, but also turns it into a milestone for future developments following the continous sophistication in microelectronics, telecommunications and embedded software technologies. The open nature of the F35-XXL makes the device perfect platform for the broadest application spectrum like fleet management, AVL, traffic control, telematics, telemetry, remote monitoring, wireless vending, security systems any many others.

technical specifications
Full Type Approval (GSM core)		CPU Core (system software features)
GSM ETSI Phase 1, 2 and 2+ compliant		Fully featured RTOS eCosTM, RedBootTM debug
		and bootstrap monitor C-libraries (standard GNU tools),
GSM/GPRS Core		Device driver: serial, flash, I/O ports, I2C, RTC, watchdog,
Siemens ICM MC35		COMM-Lib for GPS/ALARM demo application,
		GPS/ALARM demo application as open source code,
GSM/GPRS Services		TCP/IP, PPP stack
Telephony: Emergency Calls,FR/EFR/HR,DTMF
SMS: MO, MT, Cell Broadcast		Interfaces
Data GSM: CSD up to 14.4 kbps, non-transparent,		120pin board-to-board connector (Samtec BSH-
V.21, V.22, V.22bis, V.26ter, V.32, V.34, V.110		060-01-F-D-A), Integrates Molex SIM card reader (3 V,
Data GPRS (option): max. 85.6 kbps (downlink)		small SIM cards), SMB antenna connector for GSM,
Coding schemes (option): CS1, 2, 3, 4		MCX antenna connector for GPS
PPP-stack (option)
Fax: Group 3/Class 2		Power Supply
		5V +/- 10%
Supplementary Services (GSM core)
Echo cancellation, call forwarding, phonebook,		Average Current Consumption
multiparty, call barring, fixed dialling number,		GSM core (mA/5 V, with serial interface working)
call waiting & call hold, call line identity,		idle mode (Base station sends at –85 dBm):
advice of charge, USSD, SIM toolkit (option)		22 mA (GSM) / 20 mA (DCS)
		Power mode 2 (Power level 5, max.):
GPS Core/Architecture		260 mA (GSM 900) / 165 mA (DCS)
SiRFstarII (SiRF)/12 channel		Power mode 3 (Power level 7):
		215 mA (GSM 900) / 130 mA (DCS)
GPS Protocols/Navigation Modes		GPS core
NMEA-0183, RTCM SC-104, SiRF Binary/		max. 600 mW (continues mode)
3D, 2D, DGPS		max. 150 mW (default trickle power mode,
		800 ms OFF, 200 ms ON)
Acquisition Rate (GPS core)		max. 15 mW (trickle power mode, 200 ms ON
Snap start < 3 s, average		each 10 s)
Hot start < 8 s, average		CPU core (5V)
Warm start < 38 s, average		max. 52 mA (busy mode)
Cold start < 45 s, average		max. 6 mA (idle mode)
		max. 4,8 mA (stopp mode)
CPU Core (hardware features)
NEC V850SA1 + eCosTM		Temperature Range
1 or 2 MB Flash and SRAM		Operation: -20 to +55 єC
4 kB EEPROM, RTC, watchdog		Storage: -25 to +70 єC
4 UARTs, I2C, SPI (MMC)
8 GPIOs, 8 GPIs (up to 8 analog inputs)		Dimensions/Weight
CPLD for internal and external logic control		95 x 50 x 15 mm/60 g
16 Bit address/data bus multiplexed
		Development support
		Complete hardware and software evaluation kit
		available
		Customised engineering workshops
		eCosTM developers training offered by
		RedHatTM Inc (www.redhat.com)